CTS Pre requisites
1. Placement database should be legal
2. Timing/ Congestion is Good
3. Remove Ideal Network
4. Remove Don’t use and Don’t touch on CTS Buffers and Inverters
5. Remove Fixed attribute on Clock Cells
6. Remove Existing Buffer tree -- In high fanout it may add buffers
7. CTS Exception
CTS Constraints
1. Clock Tranistions
2. Clock Capacitance
3. Clock Fanout
4. Latency
5. Skew
CTS Setup
1. CTS Buffers
2. NDR rules -2W -2S or 1W 3S
3. Clock Metal layers
4. Clock Algorithms
5. Clock Balance points
CLOCK_OPT
Reports
1. Report_Clock_qor
2. Report_clock_tree –summary –latency –skew –DRV
3. Report_ Clock_tree Exceptions
After CTS
1. Clock tree is correctly built or not.
2. Enable hold optimizations.
3. Don’t use cts buffers.
4. Enable hold cells.
5. Start optimization.
